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This is the public release of the Verilog Behavioral Simulator. Verilog is a Hardware Description Language used mostly for digital circuit design and simulation. This program is a simple implementation of a Verilog simulator. VBS tries to implement all of the Verilog behavioral constructs that are synthesizable, but still allow complex test vectors for simulation.

This is the public release of the Verilog Behavioral Simulator. Verilog is a Hardware Description Language used mostly for digital circuit design and simulation. This program is a simple implementation of a Verilog simulator. VBS tries to implement all of the Verilog behavioral constructs that are synthesizable, but still allow complex test vectors for simulation.

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2024-Dec-28 to 2025-Jan-27